WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance.
THE ROLE:
To validate and characterize the most cut edge Ser Des design including PAM4 224 G transceiver on the most advance technology node. Using the latest measuring equipment the semiconductor industry has to offer to benchmark AMD’s Ser Des against the challenging industry standard.
THE PERSON:
We are looking for a meticulous and motivated engineer with strong engineering skills to join the validation teams.
KEY RESPONSIBILITIES:
Post Silicon Validation of high speed Ser Des
Understand the industry requirements and specification for high speed IO
Develop validation methodology to validate new industry standard and requirements
Characterize the latest Ser Des design
Ser Des debug with designers on Silicon
Tune the latest design to performance at the most optimum setting
Generate specifications based on measured results
Work with remote teams to coordinate distributed tasks
Support FAE on customer’s issues relating to high Speed IOs
PREFERRED EXPERIENCE:
Experience in high speed IO Ser Des post-silicon validation
In-depth knowledge of the latest industry standards such as PCIe, Display Port, JESD, SDI, OIF-CEI-11 G/25 G/56 G/112 G-VSR/SR/MR/LR, IEEE 802.3 KR/CR/CAUI/GAUI etc.
Strong programming/scripting skills in coding languages such as Python, C/C++, TCL for firmware development, test methodology development and test automation
Extensive experience with common lab equipment, including BERT, analyzers, oscilloscopes, PNA/VNA etc.
Knowledge of Ser Des general architectures and link level system analysis
Good understanding of transmission line theory and electromagnetic theory
Experience in system level serial link analysis and simulation, system performance optimization and standard/architecture level study using tools such as Matlab, ADS etc.
ACADEMIC CREDENTIALS:
Bachelors/Masters degree in Electrical/Electronics Engineering
LOCATION:
Singapore#J-18808-Ljbffr