Job Description

This is a remote position. we are looking for a qualified ASIC verification engineer with deep knowledge of UVVM for our organization.
We are planning for the next generation of an ASIC that is complex but running at a rather lower speed.
For verification purposes, We have a UVVM top-level test bench with many test cases. The test bench utilizes many of the concepts of UVM including code coverage, randomization, monitors, transactions, and scoreboard. Furthermore, part of the test bench will be used for verifying the netlist.
The assignment is to understand the current testbench, update it to match the new RTL design, add needed/missing test cases to cover the latest feature additions, run the simulations and regressions, and write and update documentation. Scripts for running the test bench and test cases exist but updates might be needed to make it work with the latest simulation/verification program release. Modelsim/Questasim is used.

Requirements

• ASIC
  
• RTL Design
  
• Test case
  
• Scripting
• Deep UVVM knowledge with a track record of successful projects
  
• English or Norwegian speaking.
  

Benefits For this assignment, you need to be based in Sweden or Norway.
If based in Sweden travel to Norway might occasionally be needed but the assignment can be performed remotely otherwise.

Requirements
ASIC TL Design Test case Scripting Deep UVVM knowledge with a track record of successful projects English or Norwegian speaking.

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